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This calendar covers manufacturing-related conferences and symposia in California, including defense and electronic warfare meetings, an undersea warfare conference, utility investment programming, additive manufacturing, solid-state circuits, and electron devices. Attendees typically include engineers, researchers, manufacturers, defense professionals, utility and public-sector representatives, and industry or academic leaders.

Recurring themes include advanced manufacturing and innovation, semiconductor and electronic-device research, integrated circuits, defense technology, electromagnetic warfare, undersea systems, and energy-program investment. The listed gatherings take place in San Diego, Oxnard, Sacramento, Los Angeles, and the San Francisco Bay Area, reflecting activity across California’s defense, technology, energy, and manufacturing communities.

Highlighted events

  • DEC

    12

    SAT

    –

    DEC

    16

    WED

    IEEE International Electron Devices Meeting (IEDM) · San Francisco (San Francisco Bay Area), CA

    Electronics · Semiconductors

    The program covers semiconductor and electronic device technology, design, manufacturing, physics, modeling, and emerging computing architectures. It includes keynote presentations, technical paper sessions, tutorials, short courses, industry panels, and exhibits. Keynotes address “AI Driven Semiconductor Paradigm Shift: Optimizing the Semiconductor Industry from Device Scaling to System Integration,” “Driving AI Memory Innovation: From Device Technology to AI Memory Platform,” and “Technology Trends in the IDM Semiconductor Business.” Tutorials cover transistor evolution from planar devices to nanosheets and beyond; chiplets, heterogeneous integration, and 3D stacking; memory technologies and system co-optimization in the AI era; AI in physics-based semiconductor modeling; diverse memory technologies for adaptive computing; and advanced optical devices and wafer-scale assembly for co-packaged optics and optical I/O. The short-course program addresses distributed network design for AI, angstrom-era logic scaling, edge-device performance and design-technology/system-technology co-optimization, atomic-layer processing, advanced-packaging reliability, cryogenic electronics, memory-centric computing, HBM, oxide-semiconductor-channel DRAM, NAND scaling, spintronics, and chiplet and advanced-packaging technologies for AI and HPC systems.

  • FEB

    14

    SUN

    –

    FEB

    18

    THU

    IEEE International Solid-State Circuits Conference (ISSCC) · San Francisco (San Francisco Bay Area), CA

    Data Centers & Cloud · Electronics · Semiconductors

    Sponsored by IEEE and SSCS, the conference is a global forum for advances in solid-state circuits and systems-on-a-chip. The 2027 program centers on “Trusted Sustainable Silicon Intelligence from Edge to Cloud,” with parallel technical paper presentations, invited industry sessions, demonstrations, tutorials, Advanced-Circuit-Design Forums, a Student Research Preview, and a hardware-security short course. Plenary talks include “Holistic Semiconductor Lithography for the Age of AI” by Marco Pieters, Executive Vice President and Chief Technology Officer, ASML; “The Next Leap in Image Sensors: Pixels and Beyond in the AI Era” by Yusuke Oike, CTO / Senior Vice President, R&D, Sony Semiconductor Solutions; “At the End of the Copper Tunnel, There Is Light” by Matt Murphy, Chairman and CEO, Marvell; and “From Silicon to Deployed Infrastructure: Redefining the Semiconductor Design Challenge at Hyperscale” by Rani Borkar, President, Azure Hardware Systems and Infrastructure, Microsoft. Forums cover next-generation AI and HPC through memory, interconnect, power, and architecture co-design; 448G–3.2T wireline data converters; electrical and optical connectivity; AI-optimized sensing; 6G circuits and systems; and silicon systems for quantum sensing and computing. Tutorials address safe robotics, switched-capacitor power converters, adaptive clocking, time-domain ADCs, machine-learning accelerator design, energy-harvesting sensing, mm-wave LO scaling, analog design automation, radar LO generation, and die-to-die interfaces. The hardware-security short course covers fundamentals, cryptographic architectures, hardware attacks and chip-level countermeasures, and hardware roots of trust. Industry-focused sessions address commercial chip-product releases and topics including processors/SoCs, AI, machine learning, 5G, radar, wireline, quantum computing, automotive, healthcare, and robotics. The program also includes the panel “The Analog Renaissance: Can Unconventional Physical Computing and Optical Interconnects Define the Next Strategic Leap?”

  • FEB

    16

    TUE

    –

    FEB

    18

    THU

    WEST Conference (AFCEA International & U.S. Naval Institute) · San Diego, CA

    Aerospace & Defense · Electronics · Maritime & Shipbuilding

    Sea Service leaders from the Navy, Marine Corps, and Coast Guard, together with industry and academic experts, address rapidly changing threats and operational challenges. Content covers platforms, communications and technical systems, weapons, advanced technologies, and capabilities supporting maritime operations. The conference theme is “Generating Combat Power Across Multiple Global Maritime Fronts.” Programming includes keynotes, panels, special presentations, government and military speakers, and an expanded two-level exhibition area. WEST is co-hosted by AFCEA International and the U.S. Naval Institute.

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