2027 IEEE International Solid-State Circuits Conference (ISSCC)
Date
February 14, 2027
Format
In-Person
Location
San Francisco, CA
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About
Sponsored by IEEE and SSCS, the conference is a global forum for advances in solid-state circuits and systems-on-a-chip. The 2027 program centers on “Trusted Sustainable Silicon Intelligence from Edge to Cloud,” with parallel technical paper presentations, invited industry sessions, demonstrations, tutorials, Advanced-Circuit-Design Forums, a Student Research Preview, and a hardware-security short course. Plenary talks include “Holistic Semiconductor Lithography for the Age of AI” by Marco Pieters, Executive Vice President and Chief Technology Officer, ASML; “The Next Leap in Image Sensors: Pixels and Beyond in the AI Era” by Yusuke Oike, CTO / Senior Vice President, R&D, Sony Semiconductor Solutions; “At the End of the Copper Tunnel, There Is Light” by Matt Murphy, Chairman and CEO, Marvell; and “From Silicon to Deployed Infrastructure: Redefining the Semiconductor Design Challenge at Hyperscale” by Rani Borkar, President, Azure Hardware Systems and Infrastructure, Microsoft. Forums cover next-generation AI and HPC through memory, interconnect, power, and architecture co-design; 448G–3.2T wireline data converters; electrical and optical connectivity; AI-optimized sensing; 6G circuits and systems; and silicon systems for quantum sensing and computing. Tutorials address safe robotics, switched-capacitor power converters, adaptive clocking, time-domain ADCs, machine-learning accelerator design, energy-harvesting sensing, mm-wave LO scaling, analog design automation, radar LO generation, and die-to-die interfaces. The hardware-security short course covers fundamentals, cryptographic architectures, hardware attacks and chip-level countermeasures, and hardware roots of trust. Industry-focused sessions address commercial chip-product releases and topics including processors/SoCs, AI, machine learning, 5G, radar, wireline, quantum computing, automotive, healthcare, and robotics. The program also includes the panel “The Analog Renaissance: Can Unconventional Physical Computing and Optical Interconnects Define the Next Strategic Leap?”
Speakers(18)
Executive Vice President and Chief Technology Officer, ASML
CTO / Senior Vice President, R&D, Sony Semiconductor Solutions
Chairman and CEO, Marvell
President, Azure Hardware Systems and Infrastructure, Microsoft
Analog Devices
University of Macau
Georgia Institute of Technology
University of Macau
Stanford University
Kyoto University
Braunschweig University of Technology
Northeastern University
Qualcomm Technologies
Cadence Design Systems
University of Michigan
Worcester Polytechnic Institute
Kobe University
KU Leuven
Topics
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