Track every Semiconductor Industry event across the US — free for 30 days

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All 50

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2,434

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This US semiconductor events calendar covers industry conferences, technical symposia, strategy meetings, and specialized gatherings for professionals across the chip ecosystem. The sample includes events for semiconductor manufacturing, equipment and materials, electronic specialty gases, surface preparation and cleaning, packaging and integration, solid-state circuits, electron devices, microwave technology, and design.

Attendees may include engineers, researchers, manufacturers, suppliers, designers, and industry strategists. Recurring themes include advanced manufacturing, process materials and contamination control, device and circuit development, electronic and photonic packaging, high-frequency systems, industry strategy, and international trade. The events are held in locations including California, Arizona, Hawaii, New York, and Texas.

Highlighted events

  • NOV

    1

    SUN

    –

    NOV

    4

    WED

    SEMI (Semiconductor Equipment and Materials International) · Kapolei (Honolulu), HI

    Semiconductors

    ITPC is an executive thought-leadership and relationship-building conference focused on global semiconductor manufacturing, supply chains, economic trends, geopolitics, technology, markets, and applications. The program includes keynotes from semiconductor leaders; Markets & Applications presentations; a Technology session and panel; a Future Playgrounds session covering advanced power and energy technologies; and a Trade & Politics program with geopolitical and public-policy discussions. Named participants include Janice Golda, Sr. Director, Lithography Strategic Sourcing, Intel; Joe Stockunas, President, SEMI Americas; Ajit Manocha, President & CEO, SEMI; Marco Pieters, Chief Technology Officer, ASML; Sangjin Hyun, Corporate EVP & Head of Advanced Process Development Team, Samsung Electronics; Tomoharu Watanabe, Executive Vice President and Executive Officer, KIOXIA; Young Mann Cho, Head of R&D Technology Development, SK hynix; Yasumitsu Orii, Senior Managing Executive Officer and Head of Engineering Center, Rapidus; Mario Morales, Head of Corporate Strategy and Partnerships, AMD; Masaru Tsuchiya, Partner, McKinsey & Co Japan; Myung-Hee Na, VP, Technology Research, Intel; Thomas Sonderman, CEO and Director, SkyWater Technology; Om Nalamasu, CTO and Senior VP, Applied Materials; Pat Gelsinger, General Partner, Playground Global; Mikal Bøe, Founder and CEO, CORE POWER; Royal Kastens, VP, Global Public Policy & Advocacy, SEMI; John Seaton, Founding Partner and Bloomberg Contributor, Echo Canyon Consulting; and panelists from KIOXIA, Nexperia, Teradyne, Samsung, Intel, and Advantest.

  • DEC

    12

    SAT

    –

    DEC

    16

    WED

    IEEE International Electron Devices Meeting (IEDM) · San Francisco (San Francisco Bay Area), CA

    Electronics · Semiconductors

    The program covers semiconductor and electronic device technology, design, manufacturing, physics, modeling, and emerging computing architectures. It includes keynote presentations, technical paper sessions, tutorials, short courses, industry panels, and exhibits. Keynotes address “AI Driven Semiconductor Paradigm Shift: Optimizing the Semiconductor Industry from Device Scaling to System Integration,” “Driving AI Memory Innovation: From Device Technology to AI Memory Platform,” and “Technology Trends in the IDM Semiconductor Business.” Tutorials cover transistor evolution from planar devices to nanosheets and beyond; chiplets, heterogeneous integration, and 3D stacking; memory technologies and system co-optimization in the AI era; AI in physics-based semiconductor modeling; diverse memory technologies for adaptive computing; and advanced optical devices and wafer-scale assembly for co-packaged optics and optical I/O. The short-course program addresses distributed network design for AI, angstrom-era logic scaling, edge-device performance and design-technology/system-technology co-optimization, atomic-layer processing, advanced-packaging reliability, cryogenic electronics, memory-centric computing, HBM, oxide-semiconductor-channel DRAM, NAND scaling, spintronics, and chiplet and advanced-packaging technologies for AI and HPC systems.

  • FEB

    14

    SUN

    –

    FEB

    18

    THU

    IEEE International Solid-State Circuits Conference (ISSCC) · San Francisco (San Francisco Bay Area), CA

    Data Centers & Cloud · Electronics · Semiconductors

    Sponsored by IEEE and SSCS, the conference is a global forum for advances in solid-state circuits and systems-on-a-chip. The 2027 program centers on “Trusted Sustainable Silicon Intelligence from Edge to Cloud,” with parallel technical paper presentations, invited industry sessions, demonstrations, tutorials, Advanced-Circuit-Design Forums, a Student Research Preview, and a hardware-security short course. Plenary talks include “Holistic Semiconductor Lithography for the Age of AI” by Marco Pieters, Executive Vice President and Chief Technology Officer, ASML; “The Next Leap in Image Sensors: Pixels and Beyond in the AI Era” by Yusuke Oike, CTO / Senior Vice President, R&D, Sony Semiconductor Solutions; “At the End of the Copper Tunnel, There Is Light” by Matt Murphy, Chairman and CEO, Marvell; and “From Silicon to Deployed Infrastructure: Redefining the Semiconductor Design Challenge at Hyperscale” by Rani Borkar, President, Azure Hardware Systems and Infrastructure, Microsoft. Forums cover next-generation AI and HPC through memory, interconnect, power, and architecture co-design; 448G–3.2T wireline data converters; electrical and optical connectivity; AI-optimized sensing; 6G circuits and systems; and silicon systems for quantum sensing and computing. Tutorials address safe robotics, switched-capacitor power converters, adaptive clocking, time-domain ADCs, machine-learning accelerator design, energy-harvesting sensing, mm-wave LO scaling, analog design automation, radar LO generation, and die-to-die interfaces. The hardware-security short course covers fundamentals, cryptographic architectures, hardware attacks and chip-level countermeasures, and hardware roots of trust. Industry-focused sessions address commercial chip-product releases and topics including processors/SoCs, AI, machine learning, 5G, radar, wireline, quantum computing, automotive, healthcare, and robotics. The program also includes the panel “The Analog Renaissance: Can Unconventional Physical Computing and Optical Interconnects Define the Next Strategic Leap?”

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