72nd Annual IEEE International Electron Devices Meeting

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Date

December 12

Format

Hybrid

Location

San Francisco, CA

Price

$300 – $915

Regular conference rates; IEEE member, non-member, student, and life-member tiers. Discounted rates are available through November 10, 2026.

Manufacturing
Technology
Engineering
Innovation

Importance:

Top

Editions

2026 (this edition)2027

About

The technical program covers semiconductor and electronic-device technology, design, manufacturing, physics, and modeling, including CMOS transistor technology, advanced memory, displays, sensors, MEMS, quantum and nanoscale devices, optoelectronics, power and energy-harvesting devices, and emerging material systems. Featured technical themes include AI-driven semiconductor scaling and system integration; memory technologies and system co-optimization; IDM manufacturing trends; chiplets, heterogeneous integration, and 3D stacking; AI and machine learning in physics-based semiconductor modeling; advanced-packaging reliability; cryogenic electronics for quantum computing; and optical devices for co-packaged optics and optical I/O. Short-course subjects include AI-era logic scaling, atomic-layer processing, HBM, NAND, spintronics, and memory-centric computing.

Schedule

Times are local to the event.

1:30 PM – 2:50 PM2 sessions at the same time

1:30 PM – 2:50 PM

Evolution of the transistor from planar to nanosheet and beyond

Larry Bair

1:30 PM – 2:50 PM

Chiplet, heterogeneous integration, 3D stacking technologies principles and state of the art

Oliver Noblanc

3:05 PM – 4:25 PM2 sessions at the same time

3:05 PM – 4:25 PM

Memory Technologies and System Co-Optimization in the AI Era: Past, Present and Future

Fatih Hamzaoglu

3:05 PM – 4:25 PM

AI in Physics-based Semiconductor Modeling: From PDE-constrained Learning to Agentic TCAD/DTCO Workflows

Pratheep Balasingam

4:40 PM – 6:00 PM2 sessions at the same time

4:40 PM – 6:00 PM

Diverse Memory Technologies for Adaptive Computing: From Device Physics to Cooperative Architectures

Elisa Vianello

4:40 PM – 6:00 PM

Advanced Optical Devices and Wafer-Scale Assembly for next-generation CPO and Optical I/O

Joris Vancampenhout

Speakers(22)

Naga Chandrasekaran

Executive Vice President – Chief Technology and Operations Officer – General Manager, Intel Foundry

Yunik Son

Vice President of Device Technology Solution, SK Hynix

Fabio Gualandris

President, Quality, Manufacturing & Technology, STMicroelectronics

Larry Bair

Senior Director, Silicon Design Engineering, AMD

Oliver Noblanc

Director, Process Integration R&D, ST Micro

Pratheep Balasingam

Executive Director of R&D Engineering, Synopsys

Fatih Hamzaoglu

Intel Fellow

Joris Vancampenhout

Fellow, Silicon Photonics, imec

Brad Beckmann

AMD Fellow

Thorsten Lill

LAM Executive

Damien Querlioz

Research Director, Université Paris-Saclay CNRS

HyunBae Lee

Distinguished Engineer, SK hynix

Elisa Vianello

Senior Fellow, CEA-Leti

Seung Hoon Sung

Principal Engineer, Intel

Jun Yuan

Senior Director, Qualcomm

Yao-Chun Chuang

Deputy Director, TSMC

Loïck Le Guevel

IC Design Engineer, Google

Keiji Ikeda

Chief Specialist, Kioxia

Kishore Muchherla

Distinguished Member of Technical Staff, Micron

Akira Goda

Distinguished Member of Technical Staff, Micron

Shunsuke Fukami

Professor, Tohoku University

John Knickerbocker

Distinguished Engineer, IBM

Funding programs

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