Second Semiconductor Traceability and Provenance Workshop

Theme: EMS Superiority – Challenges and Opportunities Across the Globe. The convention addresses the evolving landscape of electromagnetic warfare and electromagnetic spectrum operations, including the policies, partnerships, and technologies needed to achieve superiority in a contested and congested domain. Programming includes keynote presentations from senior military commanders and industry thought leaders; technical sessions on electromagnetic warfare, cyber operations, and spectrum dominance; interactive breakouts; expert-led panel discussions; and program manager briefings specific to the Navy, Army, and Air Force. The expo hall features technologies and solutions from defense contractors, emerging technology companies, and research institutions.

SPCC combines technical sessions, poster presentations, and business-focused programming on surface preparation, cleaning technologies, and wet processes for semiconductor manufacturing. Technical topics include front-end, back-end, and packaging; cleaning equipment, materials, and metrology; advanced-memory challenges such as pattern collapse, contaminant removal from high-aspect-ratio structures, selective etching, and surface preparation for DRAM, 3D-NAND, and emerging memories; and wet and dry cleaning for FinFET, gate-all-around, nanosheet, nanowire, and CFET devices. Other areas include post-etch and post-CMP cleaning, advanced interconnect and EUV mask cleaning, contamination control, high-purity water and chemical delivery, in-situ monitoring, process control and AI/machine learning, trace-particle and metal detection, and sustainability. The scope also includes surface preparation for Ge, III-V, GaN, SiC, and 2D systems, as well as photovoltaics, MEMS, and nanoelectronics. Business-focused programming addresses macroeconomic, market, and structural trends shaping the global semiconductor industry, including industry dynamics, supply chain, and strategic outlook.

The conference theme is “Beyond the $1T Milestone: Building the Next Chapter of Semiconductor Growth.” Topics include semiconductor demand, AI, memory, advanced packaging, quantum technologies, manufacturing capacity, supply chain resilience, and ecosystem partnerships. Program sessions address macroeconomic outlook and geopolitics; memory and AI semiconductor demand; non-AI semiconductor, equipment, and materials forecasts; advanced packaging; quantum computing; robotics; co-packaged optics; and inference AI. Further sessions examine global fab capacity, whether semiconductor capacity can keep pace with demand, and what it will take to sustain the next era of growth. A Bulls & Bears panel focuses on U.S. semiconductor and semiconductor capital-equipment investment.

The program centers on “Trusted Sustainable Silicon Intelligence from Edge to Cloud,” with plenary papers and parallel technical presentations. Technical areas include analog circuits, data converters, digital circuits and architectures, image sensors and displays, medical circuits, memory, power management, RF and wireless systems, security, technology directions, and wireline. Tutorial topics include circuit design for autonomous vehicles, switched-capacitor power converters, adaptive clocking, time-domain ADCs, machine-learning accelerators, energy-harvesting sensors, mm-wave local-oscillator techniques, analog design automation, radar and sensing, and die-to-die interfaces. Six Advanced-Circuit-Design Forums address AI and HPC co-design; high-speed wireline data converters; electrical and optical connectivity; AI-optimized sensing; circuits for 6G communication, sensing, and edge AI; and silicon systems for quantum sensing and computing. Other program elements include “The Analog Renaissance: Can Unconventional Physical Computing and Optical Interconnects Define the Next Strategic Leap?”, a Student Research Preview with work-in-progress presentations and posters, an invited industry track on commercial chips and systems for AI training and inference, and demonstration sessions. The short course covers hardware security, including cryptographic architectures, hardware attacks and chip-level countermeasures, and hardware roots of trust. Plenary speakers include Marco Pieters, Executive Vice President and Chief Technology Officer at ASML, and Matt Murphy, Chairman and CEO of Marvell.

Co-hosted by SPE FMTS and TÜV SÜD NEL, this technical forum focuses on defensible, traceable flow measurement for production, allocation, custody transfer, emissions reporting, regulatory compliance, commercial settlement, and emerging-energy applications. The program is being developed around six technical sessions, with moderated discussion and posters; final session groupings are to be set after abstracts are reviewed. Topics include field measurement challenges across changing operating conditions and brownfield or offshore installations; meter design, manufacturing controls, technology selection, and quality assurance; calibration, qualification, laboratory-to-field transferability, and uncertainty; deployment, diagnostics, data quality, and continuous assurance; single-phase measurement, custody transfer, and allocation; CCUS, hydrogen, methane, and emerging-energy measurement; and validation, governance, and decision-grade evidence. Specific issues include meter performance limits, sensor and meter-body design, traceability, reference quality, commissioning and configuration control, anomaly detection, fiscal measurement assurance, emissions evidence, uncertainty propagation, and criteria for recalibrating, repairing, or replacing meters.

The conference serves semiconductor-industry executives, engineering and fab managers, academics, startup founders, financial analysts, market researchers, consulting firms, and consortia. Its stated focus is materials innovation, management, and business success; the 2027 agenda is not yet published.

The technical program covers semiconductor and electronic-device technology, design, manufacturing, physics, and modeling, including CMOS transistor technology, advanced memory, displays, sensors, MEMS, quantum and nanoscale devices, optoelectronics, power and energy-harvesting devices, and emerging material systems. Featured technical themes include AI-driven semiconductor scaling and system integration; memory technologies and system co-optimization; IDM manufacturing trends; chiplets, heterogeneous integration, and 3D stacking; AI and machine learning in physics-based semiconductor modeling; advanced-packaging reliability; cryogenic electronics for quantum computing; and optical devices for co-packaged optics and optical I/O. Short-course subjects include AI-era logic scaling, atomic-layer processing, HBM, NAND, spintronics, and memory-centric computing.

The program includes company presentations, a concierge discussion and feedback, economic development perspectives, and Q&A. It is intended for semiconductor supply-chain leaders, companies seeking advanced-manufacturing business, economic development leaders, and service providers. The event also welcomes companies from multiple regions, including Malaysia, the Republic of Korea, the United States, Mexico, Canada, Taiwan, Japan, Thailand, Vietnam, the Philippines, Germany, the Netherlands, the United Kingdom, Israel, Yemen, and the UAE. A concierge approach is designed to help companies entering the U.S. semiconductor supply chain connect with relevant people. The event also highlights opportunities to connect with Malaysian exhibitors.

An international technical conference on solutions for improving semiconductor manufacturing. Technical presentations highlight industry innovations with specific results, and papers presented at the conference are peer-reviewed by the ASMC Technical Committee; select manuscripts are published in the IEEE Transactions on Semiconductor Manufacturing special section. The 2027 call for abstracts covers Advanced Equipment Processes and Materials; Advanced Metrology; Advanced Process Control; Defect Free Manufacturing; Defect Inspection and Reduction; Big Data Management and Cybersecurity; Equipment Optimization; Manufacturing for Sustainability; Novel Device Technologies; Patterning, Design & Technology Optimization; and Smart Manufacturing & Factory Operations.

The workshop covers advancements, challenges, and gaps in flexible hybrid electronics, hybrid electronics, and bio-signal sensing for real-time cognitive and physical state monitoring and augmentation, and includes AI for Metrology (AI4MT) sessions. Day 1, the Innovation Forum, features technical presentations on advances from FlexTech and NBMC. Day 2, Technical Gap Analysis, uses collaborative breakout sessions to examine technology gaps and roadmaps, shape FlexTech and NBMC research priorities, and inform future Request for Proposal directions. Day 3, the AI for Metrology Workshop, explores connecting metrology, failure-analysis, and test data across the semiconductor supply chain. Topics include AI-assisted defect localization and root-cause analysis, non-destructive modalities, targeted physical characterization, chiplets, heterogeneous integration, and advanced packaging. Industry tours at SkyWater Technology and NeoCity Academy are also listed.